ADS1015 Module¶
This module contains the Zerynth driver for Texas Instruments ADS101x precision Analog-to-Digital Converters with I2C interface (datasheet).
Example:
from texas.ads1015 import ADS1015
...
ads = ads1015.ADS1015(I2C0, addr = 0x49, clk=400000)
ads.set(ch = 4, pga = 1)
value1 = ads.get_raw_data()
ads.set(ch = 3, pga = 4)
value2 = ads.get_raw_data()
ADS1015 class¶
-
class
ADS1015
(i2cdrv, addr = 0x48, clk = 100000)¶ Creates an instance of the ADS1015 class. This class allows the control of all ADS1013, ADS1014, and ADS1015 devices.
Parameters: - i2cdrv – I2C Bus used ‘(I2C0, ...)’
- addr – Slave address, default 0x48
- clk – Clock speed, default 100 kHz
-
set
(os = 0, ch = 4, pga = 2, mode = 0, sps = 4, cmode = 0, cpol = 0, clat = 0, cque = 3)¶ Sets the device’s configuration register.
Parameters:
os : sets the Operational Status od the device. It can only be written when in power-down state and has no effect when a conversion is ongoing, available values are:
0
: No effect1
: Start a single conversion (when in power-down state)
ch : (ADS1015 only) Configure the input multiplexer.
ch positive channel negative channel 0 AIN0 AIN1 1 AIN0 AIN3 2 AIN1 AIN3 3 AIN2 AIN3 4 AIN0 GND 5 AIN1 GND 6 AIN2 GND 7 AIN3 GND pga : (ADS1014 and ADS1015 only) PGA Gain selection.
pga Gain ADC full-scale range 0 1/3 ± 6.144 V 1 1/2 ± 4.096 V 2 1 ± 2.048 V 3 2 ± 1.024 V 4 4 ± 0.512 V 5 8 ± 0.256 V 6 8 ± 0.256 V 7 8 ± 0.256 V mode : sets the device operating mode. Available values are:
0
: Continuous-conversion mode.1
: Single-shot mode or power-down state
sps : Data rate setting.
sps Samples per second 0 128 1 250 2 490 3 920 4 1600 5 2400 6 3300 7 3300 cmode : (ADS1014 and ADS1015 only) Comparator operating mode.
0
: Traditional comparator.1
: Window comparator.
cpol : (ADS1014 and ADS1015 only) Set the polarity of the ALERT/RDY pin.
0
: Active low.1
: Active high.
clat : (ADS1014 and ADS1015 only) Controls whether the ALERT/RDY pin latches.
0
: Nonlatching comparator.1
: Latching comparator.
cque : (ADS1014 and ADS1015 only) Comparator queue and disable.
cque effect 0 Assert ALERT/RDY pin after one conversion exceeding the threshold 1 Assert ALERT/RDY pin after two conversion exceeding the threshold 2 Assert ALERT/RDY pin after four conversion exceeding the threshold 3 Disable comparator and set ALERT/RDY pin to high-impedance
-
set_threshold
(low, high)¶ Set the upper and lower threshold values used by the comparator. The comparator is implemented as a digital comparator; therefore, the valuese must be updated whenever the PGA settings are changed.
Available values for both low and high parameters are 12-bit signed intergers, from -2048 to 2047.
-
get_raw_data
()¶ Return the conversion result as an 12-bit signed integer. A positive full-scale input produces an output of 2047, a negative full-scale input produces an output of -2048.